1. Field of the Invention
The present invention relates to a high frequency amplifier, more particularly, to a high frequency amplifier for amplifying a high frequency signal, such as a microwave signal and a millimeter wave signal.
2. Description of the Related Art
Recently, high frequency amplifiers integrating active elements, such as field effect transistors (FETs), are widely used to amplify high frequency signals in microwave bands and millimeter wave bands. One issue in amplifying a high frequency signal is that a high frequency amplifier may suffer from undesirable oscillation due to the feedback capacitance of an active element between the input terminal and output terminal. In detail, an output signal may be undesirably fed back from the output terminal to the input terminal through the feedback capacitance formed within an active element, and the operation of the amplifier may become instable to cause oscillation, when the output signal is positively fed back.
In order to stabilize the operation of an amplifier incorporating an active element, it is desirable to reduce the feedback capacitance of the active element or to neutralize the feedback capacitance by adding an external circuit. Since it is impossible to reduce the feedback capacitance down to zero, a generally used approach is to add an external circuit which equivalently reduces the feedback capacitance down to zero; such external circuit is referred to as a neutralization circuit, hereinafter. The neutralization circuit effectively eliminates the feedback signal and thereby allows maximizing the power gain of the high frequency amplifier.
In the following, a description is given of the ideal principle of a neutralization circuit of a high frequency amplifier. FIG. 8A is a circuit diagram illustrating an exemplarily configuration of a high frequency amplifier, and FIG. 8B is an equivalent circuit diagram of the high frequency amplifier shown in FIG. 8A; such neutralization circuit configuration is disclosed in Japanese Laid Open Patent Application No. JP-A 2005-176331, for example. Referring to FIG. 8A, the high frequency amplifier is provided with an amplifying FET and an inductor element Lext connected between the gate and drain of the amplifying FET. The gate and drain of the amplifying FET are connected with the input and output terminals of the high frequency amplifier, respectively. The inductor element Lext functions as a neutralization circuit. In this circuit configuration, the amplifier exhibit the parallel resonance between the gate and drain of the amplifying FET when the input signal has a frequency of fp0 defined as follows:
                              f                      p            ⁢                                                  ⁢            0                          =                  1                      2            ⁢            π            ⁢                                                            C                  gd                                ⁢                                  L                  ext                                                                                        (        1        )            where Cgd is the gate-drain capacitance of the amplifying FET.
The impedance between the gate and drain of the amplifying FET is infinitely great at the parallel resonance frequency fp0. When a signal of a frequency equal to the parallel resonance frequency fp0 is inputted, the feedback capacitance is “neutralized”, that is, the gate and drain is electrically isolated with respect to the high frequency. When the feedback capacitance is “neutralized”, the reverse gain from the drain (the output terminal) to the gate (the input terminal) is reduced down to zero, and the amplifier exhibits the maximum forward gain.
In an actual circuit, DC isolation is required between the gate and drain of the amplifying FET to provide different bias voltages for the gate and drain. Japanese Laid Open Patent Application No. JP-A 2000-196365 (hereinafter, referred to as the '365 application) discloses a neutralization circuit with DC isolation between the input and output terminals of a high frequency amplifier. FIG. 9 is a circuit diagram illustrating the configuration of the high frequency amplifier disclosed in the '365 application.
The high frequency amplifier shown in FIG. 9 is composed of an amplifying FET 20, and a parallel circuit connected between the gate and drain of the amplifying FET 20. The parallel circuit includes a DC-isolation capacitor 10, an inductor element 21 for causing parallel resonance, a switching FET 22, and a resistor element connected between the switching FET 22.
In a relatively low frequency range of several GHz, the high frequency amplifier of FIG. 9 operates as follows: When the amplifying FET 20 is placed into the operation state, the switching FET 22 is turned off to thereby make the parallel circuit become the open state. When the amplifying FET 20 is placed in the non-operation state, on the other hand, the switching FET 22 is turned on, and the gate and drain of the amplifying FET 20 is electrically connected through the parallel circuit. This connection causes parallel resonance of the gate-drain capacitance Cgd and the inductor element 21.
According to such operation, the isolation between the input and output of the high frequency amplifier is improved by about 15 dB at the resonance frequency fp0 for the non-operation state of the amplifying FET 20. For the operation state, the forward gain of the amplifier is as large as that for the case when the feedback capacitance is not neutralized. When the high frequency amplifier shown in FIG. 9 is operated, the operation frequency is usually set to the resonance frequency fp0.
Although the high frequency amplifier disclosed in the '365 application achieves the neutralization of the feedback capacitance for the non-operation state to improve the isolation between the input and output, the high frequency amplifier suffers from a problem that the feedback capacitance is not neutralized to maximize the forward gain of the high frequency amplifier for the operation state.
One approach for neutralizing the feedback capacitance in the operation state may be using a neutralization circuit consists of a DC isolation capacitor 10 and an inductor element 21 as shown in FIG. 10; however, the inventor has discovered that the neutralization circuit shown in FIG. 10 undesirably exhibits negative resistance characteristics at the series resonance frequency, which is the frequency at which the neutralization circuit exhibits series resonance, and the negative resistance characteristics makes the amplifier operation unstable. When the input signal has a frequency identical to the series resonance frequency, the drain and gate is short-circuited, and the signal is directly fed back from the output terminal to the input terminal to cause the negative resistance characteristics. In the following, a description is given of the mechanism in which the neutralization circuit exhibits negative resistance characteristics.
The series resonance frequency fio is expressed by the following formula:
                              f                      i            ⁢                                                  ⁢            0                          =                              1                          2              ⁢              π                                ⁢                                    1                                                L                  ext                                ⁢                                  C                  ext                                                                                        (        2        )            where Lext is the inductance of the inductor 21, and Cext is the capacitance of the DC isolation capacitor 20. When Cext is 8 fF and Lext is 14 μH, the series resonance frequency fio is 15 GHz. In this case, the frequency characteristics of the input/output return losses S11 and S22 between the gate and drain are obtained as shown in FIG. 11 for Cgd being 20 fF. As shown in FIG. 11, the input return loss S11 is larger than 0 dB in the frequency range between 16.1 GHz (denoted by A1) and 17.7 GHz (denoted by A2). Therefore, the reflection coefficient Γ in this frequency range is plotted on the Smith chart in the region out of the circle corresponding to |Γ|=1. In other words, the neutralization circuit exhibits negative resistance characteristics in the frequency range between 16.1 GHz and 17.7 GHz. Therefore, the operation of the high frequency amplifier is unstable in this frequency region; the high frequency amplifier may oscillate depending on the external circuit connected thereto. As thus described, a high frequency amplifier with a neutralization circuit consisting of a DC isolation capacitor and an inductor element suffers from a problem that the high frequency amplifier unstably operates in the frequency region around the series resonance frequency fi0.
In general, an amplifier circuit with a feedback circuit is designed to achieve stable operation by incorporating a resistor into the feedback circuit to thereby reduce the gain thereof. When this technique is applied to the neutralization circuit, however, this approach undesirably increases the loss in the neutralization circuit, and therefore reduces the power gain of the high frequency amplifier below the forward gain of the amplifying FET.
Japanese Laid Open Patent Application No. JP-A 2002-171139 discloses another neutralization circuit configuration for avoiding negative feedback from the output terminal to the input terminal, in which the neutralization circuit consists of a capacitor and inductor which are connected in parallel; however, this application is silent on avoiding negative resister characteristics.